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<div class="header">
  <div class="summary">
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">Functions<div class="ingroups"><a class="el" href="group__group__sysclk.html">SysClk       (System Clock)</a> &raquo; <a class="el" href="group__group__sysclk__clk__pwr.html">Power Clock</a></div></div>  </div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga67797f8c99ea82f42ee9c851c0c320cf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__clk__pwr__funcs.html#ga67797f8c99ea82f42ee9c851c0c320cf">Cy_SysClk_ClkPwrSetDivider</a> (uint32_t divider)</td></tr>
<tr class="memdesc:ga67797f8c99ea82f42ee9c851c0c320cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the clock divider for Power clock.  <a href="#ga67797f8c99ea82f42ee9c851c0c320cf">More...</a><br /></td></tr>
<tr class="separator:ga67797f8c99ea82f42ee9c851c0c320cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1e5eb62dc8e5d6e2868ad6e9ab4e10da"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__clk__pwr__funcs.html#ga1e5eb62dc8e5d6e2868ad6e9ab4e10da">Cy_SysClk_ClkPwrGetDivider</a> (void)</td></tr>
<tr class="memdesc:ga1e5eb62dc8e5d6e2868ad6e9ab4e10da"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the clock divider of Power clock.  <a href="#ga1e5eb62dc8e5d6e2868ad6e9ab4e10da">More...</a><br /></td></tr>
<tr class="separator:ga1e5eb62dc8e5d6e2868ad6e9ab4e10da"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9c2e470db36c5e854811d539035d0ad0"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__clk__pwr__funcs.html#ga9c2e470db36c5e854811d539035d0ad0">Cy_SysClk_ClkPwrGetFrequency</a> (void)</td></tr>
<tr class="memdesc:ga9c2e470db36c5e854811d539035d0ad0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reports the output clock signal frequency of Power clock.  <a href="#ga9c2e470db36c5e854811d539035d0ad0">More...</a><br /></td></tr>
<tr class="separator:ga9c2e470db36c5e854811d539035d0ad0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga56d3459b796e0c51e85da74ba368eab7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__clk__pwr__funcs.html#ga56d3459b796e0c51e85da74ba368eab7">Cy_SysClk_ClkPwrSetSource</a> (<a class="el" href="group__group__sysclk__clk__pwr__enums.html#gaea34f48dfb3fbef4d7ff33862cbd2f0a">cy_en_clkpwr_in_sources_t</a> source)</td></tr>
<tr class="memdesc:ga56d3459b796e0c51e85da74ba368eab7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the source for the Power clock.  <a href="#ga56d3459b796e0c51e85da74ba368eab7">More...</a><br /></td></tr>
<tr class="separator:ga56d3459b796e0c51e85da74ba368eab7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga35a0804ce9e5014d36a0fdfe6edd0db2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__sysclk__clk__pwr__enums.html#gaea34f48dfb3fbef4d7ff33862cbd2f0a">cy_en_clkpwr_in_sources_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__clk__pwr__funcs.html#ga35a0804ce9e5014d36a0fdfe6edd0db2">Cy_SysClk_ClkPwrGetSource</a> (void)</td></tr>
<tr class="memdesc:ga35a0804ce9e5014d36a0fdfe6edd0db2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reports the source for the Power clock.  <a href="#ga35a0804ce9e5014d36a0fdfe6edd0db2">More...</a><br /></td></tr>
<tr class="separator:ga35a0804ce9e5014d36a0fdfe6edd0db2"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<h2 class="groupheader">Function Documentation</h2>
<a id="ga67797f8c99ea82f42ee9c851c0c320cf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga67797f8c99ea82f42ee9c851c0c320cf">&#9670;&nbsp;</a></span>Cy_SysClk_ClkPwrSetDivider()</h2>

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          <td class="memname">void Cy_SysClk_ClkPwrSetDivider </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>divider</em></td><td>)</td>
          <td></td>
        </tr>
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<p>Sets the clock divider for Power clock. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">divider</td><td>divider value between 1 and 256.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: Set CLKPWR divider to 8 */</span></div><div class="line"><span class="preprocessor">    #if (defined (CY_IP_MXS40SSRSS) &amp;&amp; (CY_MXS40SSRSS_VER_1_2 &gt; 0UL))</span></div><div class="line"></div><div class="line">    <span class="keywordflow">if</span>(8UL != <a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga1e5eb62dc8e5d6e2868ad6e9ab4e10da">Cy_SysClk_ClkPwrGetDivider</a>())</div><div class="line">    {</div><div class="line">        <span class="comment">/* Set the CLKPWR divider to 8 */</span></div><div class="line">        (void)<a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga67797f8c99ea82f42ee9c851c0c320cf">Cy_SysClk_ClkPwrSetDivider</a>(8UL);</div><div class="line">    }</div><div class="line"></div><div class="line">    <span class="comment">/* Check the CLKPWR frequency */</span></div><div class="line">    uint32_t freq = <a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga9c2e470db36c5e854811d539035d0ad0">Cy_SysClk_ClkPwrGetFrequency</a>();</div></div><!-- fragment --></dd></dl>

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<a id="ga1e5eb62dc8e5d6e2868ad6e9ab4e10da"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1e5eb62dc8e5d6e2868ad6e9ab4e10da">&#9670;&nbsp;</a></span>Cy_SysClk_ClkPwrGetDivider()</h2>

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          <td class="memname">uint32_t Cy_SysClk_ClkPwrGetDivider </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
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<p>Returns the clock divider of Power clock. </p>
<dl class="section return"><dt>Returns</dt><dd>divider value in range 1..256.</dd></dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: Set CLKPWR divider to 8 */</span></div><div class="line"><span class="preprocessor">    #if (defined (CY_IP_MXS40SSRSS) &amp;&amp; (CY_MXS40SSRSS_VER_1_2 &gt; 0UL))</span></div><div class="line"></div><div class="line">    <span class="keywordflow">if</span>(8UL != <a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga1e5eb62dc8e5d6e2868ad6e9ab4e10da">Cy_SysClk_ClkPwrGetDivider</a>())</div><div class="line">    {</div><div class="line">        <span class="comment">/* Set the CLKPWR divider to 8 */</span></div><div class="line">        (void)<a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga67797f8c99ea82f42ee9c851c0c320cf">Cy_SysClk_ClkPwrSetDivider</a>(8UL);</div><div class="line">    }</div><div class="line"></div><div class="line">    <span class="comment">/* Check the CLKPWR frequency */</span></div><div class="line">    uint32_t freq = <a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga9c2e470db36c5e854811d539035d0ad0">Cy_SysClk_ClkPwrGetFrequency</a>();</div></div><!-- fragment --></dd></dl>

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</div>
<a id="ga9c2e470db36c5e854811d539035d0ad0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9c2e470db36c5e854811d539035d0ad0">&#9670;&nbsp;</a></span>Cy_SysClk_ClkPwrGetFrequency()</h2>

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<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint32_t Cy_SysClk_ClkPwrGetFrequency </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reports the output clock signal frequency of Power clock. </p>
<dl class="section return"><dt>Returns</dt><dd>The frequency, in Hz.</dd></dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: Set CLKPWR divider to 8 */</span></div><div class="line"><span class="preprocessor">    #if (defined (CY_IP_MXS40SSRSS) &amp;&amp; (CY_MXS40SSRSS_VER_1_2 &gt; 0UL))</span></div><div class="line"></div><div class="line">    <span class="keywordflow">if</span>(8UL != <a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga1e5eb62dc8e5d6e2868ad6e9ab4e10da">Cy_SysClk_ClkPwrGetDivider</a>())</div><div class="line">    {</div><div class="line">        <span class="comment">/* Set the CLKPWR divider to 8 */</span></div><div class="line">        (void)<a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga67797f8c99ea82f42ee9c851c0c320cf">Cy_SysClk_ClkPwrSetDivider</a>(8UL);</div><div class="line">    }</div><div class="line"></div><div class="line">    <span class="comment">/* Check the CLKPWR frequency */</span></div><div class="line">    uint32_t freq = <a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga9c2e470db36c5e854811d539035d0ad0">Cy_SysClk_ClkPwrGetFrequency</a>();</div></div><!-- fragment --></dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga56d3459b796e0c51e85da74ba368eab7">&#9670;&nbsp;</a></span>Cy_SysClk_ClkPwrSetSource()</h2>

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          <td class="memname">void Cy_SysClk_ClkPwrSetSource </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="group__group__sysclk__clk__pwr__enums.html#gaea34f48dfb3fbef4d7ff33862cbd2f0a">cy_en_clkpwr_in_sources_t</a>&#160;</td>
          <td class="paramname"><em>source</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Sets the source for the Power clock. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">source</td><td><a class="el" href="group__group__sysclk__clk__pwr__enums.html#gaea34f48dfb3fbef4d7ff33862cbd2f0a">cy_en_clkpwr_in_sources_t</a></td></tr>
  </table>
  </dd>
</dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: CLKPWR source needs to be updated to the IMO. */</span></div><div class="line"><span class="preprocessor">    #if (defined (CY_IP_MXS40SSRSS) &amp;&amp; (CY_MXS40SSRSS_VER_1_2 &gt; 0UL))</span></div><div class="line"></div><div class="line">    <span class="keywordflow">if</span>(<a class="code" href="group__group__sysclk__clk__pwr__enums.html#ggaea34f48dfb3fbef4d7ff33862cbd2f0aa2399f5e6a38c1323fc70978490315cc9">CY_SYSCLK_CLKPWR_IN_IMO</a> != <a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga35a0804ce9e5014d36a0fdfe6edd0db2">Cy_SysClk_ClkPwrGetSource</a>())</div><div class="line">    {</div><div class="line">        <a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga56d3459b796e0c51e85da74ba368eab7">Cy_SysClk_ClkPwrSetSource</a>(<a class="code" href="group__group__sysclk__clk__pwr__enums.html#ggaea34f48dfb3fbef4d7ff33862cbd2f0aa2399f5e6a38c1323fc70978490315cc9">CY_SYSCLK_CLKPWR_IN_IMO</a>);</div><div class="line">    }</div><div class="line"><span class="preprocessor">    #endif</span></div></div><!-- fragment --></dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga35a0804ce9e5014d36a0fdfe6edd0db2">&#9670;&nbsp;</a></span>Cy_SysClk_ClkPwrGetSource()</h2>

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        <tr>
          <td class="memname"><a class="el" href="group__group__sysclk__clk__pwr__enums.html#gaea34f48dfb3fbef4d7ff33862cbd2f0a">cy_en_clkpwr_in_sources_t</a> Cy_SysClk_ClkPwrGetSource </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
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<p>Reports the source for the Power clock. </p>
<dl class="section return"><dt>Returns</dt><dd><a class="el" href="group__group__sysclk__clk__pwr__enums.html#gaea34f48dfb3fbef4d7ff33862cbd2f0a">cy_en_clkpwr_in_sources_t</a></dd></dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: CLKPWR source needs to be updated to the IMO. */</span></div><div class="line"><span class="preprocessor">    #if (defined (CY_IP_MXS40SSRSS) &amp;&amp; (CY_MXS40SSRSS_VER_1_2 &gt; 0UL))</span></div><div class="line"></div><div class="line">    <span class="keywordflow">if</span>(<a class="code" href="group__group__sysclk__clk__pwr__enums.html#ggaea34f48dfb3fbef4d7ff33862cbd2f0aa2399f5e6a38c1323fc70978490315cc9">CY_SYSCLK_CLKPWR_IN_IMO</a> != <a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga35a0804ce9e5014d36a0fdfe6edd0db2">Cy_SysClk_ClkPwrGetSource</a>())</div><div class="line">    {</div><div class="line">        <a class="code" href="group__group__sysclk__clk__pwr__funcs.html#ga56d3459b796e0c51e85da74ba368eab7">Cy_SysClk_ClkPwrSetSource</a>(<a class="code" href="group__group__sysclk__clk__pwr__enums.html#ggaea34f48dfb3fbef4d7ff33862cbd2f0aa2399f5e6a38c1323fc70978490315cc9">CY_SYSCLK_CLKPWR_IN_IMO</a>);</div><div class="line">    }</div><div class="line"><span class="preprocessor">    #endif</span></div></div><!-- fragment --></dd></dl>

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